ADP2370

RECOMMENDED FOR NEW DESIGNS

High Voltage, 1.2 MHz/600 kHz, 800 mA, Low Quiescent Current Buck Regulator

Part Models
9
1ku List Price
Starting From $1.80
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Part Details

  • Input voltage range: 3.2 V to 15 V, output current: 800 mA
  • Quiescent current < 14 µA in power saving mode (PSM)
  • >90% efficiency
  • Force PWM pin (SYNC), 600 kHz/1.2 MHz frequency pin (FSEL)
  • Fixed outputs: 0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.0 V, 3.3 V, 5 V, and adjustable option
  • 100% duty cycle capability
  • Initial accuracy: ±1%
  • Low shutdown current: <1.2 µA
  • Quick output discharge (QOD) option (ADP2371)
  • Synchronizable to an external clock
  • 8-lead, 0.75 mm × 3 mm × 3mm LFCSP (QFN) package
ADP2370
High Voltage, 1.2 MHz/600 kHz, 800 mA, Low Quiescent Current Buck Regulator
ADP2370-ADP2371 Functional Block Diagram ADP2370-ADP2371 Pin Configuration
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Tools & Simulations

LTspice


Models for the following parts are available in LTspice:

  • ADP2370-1.2
  • ADP2370-1.5
  • ADP2370-1.8
  • ADP2370-2.5
  • ADP2370-3.0
  • ADP2370-3.3
  • ADP2370-5.0
  • ADP2370-ADJ

ADP237x Buck Regulator Design Tool

Microsoft Excel download tool from ADIsimPower to generate a power supply design complete with a schematic, bill of materials, and performance specifications.

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LTspice

LTspice® is a powerful, fast and free simulation software, schematic capture and waveform viewer with enhancements and models for improving the simulation of analog circuits.


Evaluation Kits

eval board
AD-FMCOMMS6-EBZ

AD-FMCOMMS6-EBZ Evaluation Board

Features and Benefits

  • Reduces receiver complexity and the number of stages needed, increasing performance and reducing power consumption 
  • Avoids image rejection issues and unwanted mixing 

Product Details

The AD-FMCOMMS6-EBZ eval board is a 400MHz to 4.4GHz receiver based on the AD9652 dual 16bit analog to digital converter, the ADL5566 High Dynamic Range RF/IF Dual Differential Amplifier and the ADL5380 quadrature demodulator.

This is an I and Q demodulation approach to direct convert (also known as a homodyne or zero IF) receiver architecture. Direct conversion radios perform just one frequency translation compared to a super-heterodyne receiver that can perform several frequency translations. One frequency translation is advantageous because it:

  • Reduces receiver complexity and the number of stages needed, increasing performance and reducing power consumption
  • Avoids image rejection issues and unwanted mixing


This topology will provide image rejection and early implementation of the differential signal environment. There is an amplification stage to maintain the full-scale input to the ACD. The local oscillator and ADC clock are on board and share the same reference signal prevent smearing. The form factor is VITA57 compliant and all of the DC power is routed from the data capture board through an FMC connector. This evaluation board demonstrates a high performance receiver signal chain aimed at military and commercial radar using “commercial off the shelf” (COTS) components. The overall circuit has a bandwidth of 220MHz with a pass band flatness of +/_ 1.0 dB. The SNR and SFDR measured at an IF of 145MHz are 64dB and 75dBc, respectively.


AD-FMCOMMS6-EBZ
AD-FMCOMMS6-EBZ Evaluation Board
eval-image-unavailable

Reference Designs

CN0513 Board
CN0513 Circuits from the lab

20-Bit, 1.8 MSPS, ±2.5 ppm INL, Low Drift, High Accuracy Data Acquisition Solution

Features and Benefits

  • Data acquisition solution fully characterized over 0°C to 70°C
  • Guaranteed 20-bit no missing codes
  • INL: ±2 ppm, DNL: ±0.25 ppm
  • Throughput: 1.8 MSPS
  • Offset error drift: ±3.5 ppm/°C; gain error drift: ±6 ppm/°C
  • SNR: 98 dB at G = 1, 92 dB at G = 10, fIN = 1 kHz
  • THD: −120 dB at G = 1, −116 dB at G = 10, fIN = 1 kHz
  • Oversampled dynamic range: 102 dB at 900 kSPS, OSR = 2
  • Software programmable bipolar input ranges (±1 V to ±10 V)
    • Allows single-ended and differential signals
  • CMRR: 92 dB typical
  • GΩ input impedance allows direct interface with sensors
  • Ease of use features reduce system power and complexity
  • ADC Input overvoltage clamp protection sinks up to 50 mA
  • On-board 5 V reference and buffer
  • First conversion accurate, no latency/pipeline delay
  • Fast conversion time allows low SPI clock rates
  • SPI-/QSPI-/MICROWIRE-/DSP-compatible serial interface
CN0513
20-Bit, 1.8 MSPS, ±2.5 ppm INL, Low Drift, High Accuracy Data Acquisition Solution
CN0513 Board
CN0513 Block Diagram
AD4020 Reference Design Block Diagram

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