AD608
AD608
PRODUCTIONLow Power Mixer/Limiter/RSSI 3V Receiver IF Subsystem
- Part Models
- 4
- 1ku List Price
- Starting From $3.86
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Part Details
- Mixer
15 dBm, 1 dB compression point
5 dBm IP3
24 dB conversion gain >500 MHz input bandwidth - Logarithmic/limiting amplifier
80 dB RSSI range
±3° phase stability over 80 dB range
- Low power
21 mW at 3 V power consumption
CMOS-compatible power-down to 300 μW typical
200 ns enable/disable time
The AD608 provides a low power, low distortion, low noise mixer as well as a complete, monolithic logarithmic/limiting amplifier that uses a successive-detection technique. In addition, the AD608 provides both a high speed received signal strength indicator (RSSI) output with 80 dB dynamic range and a hard-limited output. The RSSI output is from a two-pole postdemodulation low-pass filter and provides a loadable output voltage of 0.2 V to 1.8 V. The AD608 operates from a single 2.7 V to 5.5 V supply at a typical power level of 21 mW at 3 V.
The RF and local oscillator (LO) bandwidths both exceed 500 MHz. In a typical IF application, the AD608 can accept the output of a 240 MHz surface acoustic wave (SAW) filter and down-convert it to a nominal 10.7 MHz IF with a conversion gain of 24 dB (ZIF = 165 Ω). The AD608 logarithmic/limiting amplifier section handles any IF from low frequency (LF) up to 30 MHz.
The mixer is a doubly balanced gilbert-cell mixer and operates linearly for RF inputs spanning −95 dBm to −15 dBm. It has a nominal −5 dBm third-order intercept. An on-board LO preamplifier requires only −16 dBm of LO drive. The current output of the mixer drives a reverse-terminated, industry-standard 10.7 MHz, 330 Ω filter.
The nominal logarithmic scaling is such that the output is +0.2 V for a sinusoidal input to the IF amplifier of −75 dBm and +1.8 V at an input of +5 dBm; over this range, the logarithmic conformance is typically ±1 dB. The logarithmic slope is proportional to the supply voltage. A feedback loop automatically nulls the input offset of the first stage down to the submicrovolt level.
The AD608 limiter output provides a hard-limited signal output at 400 mV p-p. The voltage gain of the limiting amplifier to this output is more than 100 dB. Transition times are 11 ns and the phase is stable to within ±3° at 10.7 MHz for signals from −75 dBm to +5 dBm.
The AD608 is enabled by a CMOS logic-level voltage input, with a response time of 200 ns. When disabled, the standby power is reduced to 300 μW within 400 ns.
The AD608 is specified for the industrial temperature range of −25°C to +85°C for 2.7 V to 5.5 V supplies and −40°C to +85°C for 3.0 V to 5.5 V supplies. This device comes in a 16-lead plastic SOIC.
APPLICATIONS
- PHS, GSM, TDMA, FM, or PM receivers
- Battery-powered instrumentation
- Base station RSSI measurements
Documentation
Data Sheet 1
Evaluation Design File 1
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal. View our quality and reliability program and certifications for more information.
Part Model | Pin/Package Drawing | Documentation | CAD Symbols, Footprints, and 3D Models |
---|---|---|---|
AD608AR | 16-Lead SOIC | ||
AD608AR-REEL | 16-Lead SOIC | ||
AD608ARZ | 16-Lead SOIC | ||
AD608ARZ-RL | 16-Lead SOIC |
Part Models | Product Lifecycle | PCN |
---|---|---|
No Match Found | ||
Oct 5, 2010 - 10_0146 Halogen Free Material Change for 14/16L SOIC_N Products |
||
AD608AR | Obsolete | |
AD608AR-REEL | Obsolete | |
AD608ARZ | PRODUCTION | |
AD608ARZ-RL | PRODUCTION | |
Apr 21, 2021 - 21_0080 Amkor Philippines as an Alternate Site for SOICN |
||
AD608ARZ | PRODUCTION | |
AD608ARZ-RL | PRODUCTION | |
Jun 19, 2017 - 17_0038 Obsolescence of Lead (Pb)-Bearing Packages |
||
AD608AR | Obsolete | |
AD608AR-REEL | Obsolete |
This is the most up-to-date revision of the Data Sheet.
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ADIsimRF
ADIsimRF is an easy-to-use RF signal chain calculator. Cascaded gain, noise, distortion and power consumption can be calculated, plotted and exported for signal chains with up to 50 stages. ADIsimRF also includes an extensive data base of device models for ADI’s RF and mixed signal components.
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ADIsimPLL enables the rapid and reliable evaluation of new high performance PLL products from ADI. It is the most comprehensive PLL Synthesizer design and simulation tool available today. Simulations performed include all key non-linear effects that are significant in affecting PLL performance. ADIsimPLL removes at least one iteration from the design process, thereby speeding the design- to-market.
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