MAXQ1050
NOT RECOMMENDED FOR NEW DESIGNSDeepCover Secure Microcontroller with USB and Hardware Cryptography
Small Footprint Cryptographic Microcontroller with Advanced Physical Security
- Part Models
- 1
- 1ku List Price
- price unavailable
Part Details
- High-Performance, Low-Power, 32-Bit MAXQ30 RISC Core
- Operates from USB Power or Single 3.3V Supply
- Runs from 20MHz (typ) Internal Oscillator
- Supports External 12/24MHz Crystal Oscillator for Microcontroller and USB Operation
- On-Chip 2x/4x Clock Multiplier
- 16-Bit Instruction Word, 32-Bit Internal Data Bus
- 16 x 32-Bit Accumulators
- 16 x 32-Bit General-Purpose Working Registers
- Up to 20 General-Purpose I/O Pins
- 5V Tolerant I/O
- Virtually Unlimited Software Stack
- Optimized for C-Compiler (High-Speed/Density Code)
- Memory
- 128KB Flash Memory, 512 x 32 Page Size
- Flash Memory Supports 20k Erase/Write Cycles per Sector
- 256B of Secure NV SRAM
- 4KB Battery-Backed NV SRAM
- 12KB SRAM
- Secure JTAG/TAP for In-System Programming and On-Chip Debugger Access
- Security
- Unique 64-Bit Serial Number
- Tamper Detection with Rapid Key/Data Destruction
- Secret Key Destruction on Tamper Events
- Permanent Loader Lockout Option
- Proprietary Code Scrambling Technique Using Random Keys
- Hardware Accelerators for AES, RSA, DSA, ECDSA, DES, 3DES, SHA-1, SHA-224, SHA-256
- True Hardware Random-Number Generator
- Temperature and Voltage Sensors to Detect Attacks
- Two Self-Destruct Input Pins
- Additional Peripherals
- Power-Fail Warning
- Power-On-Reset/Brownout Reset
- Full-Speed USB Device with Six Endpoint Buffers and Integrated Transceiver
- ISO 7816 Smart Card UART with FIFO
- 16-Bit Programmable Timers/Counters with Prescaler, Capture/Compare, and PWM
- SPI Master/Slave Hardware
- Programmable Watchdog Timer
- Up to 20 General-Purpose I/O Pins with Eight External Interrupts
The device uses the 32-bit, pipelined, highly efficient MAXQ30 microcontroller core. It integrates 128KB flash memory, 12KB of volatile SRAM, 4KB of battery-backed erasable NV SRAM, and 256B of battery-backed, secure zeroization NV SRAM. An additional 1.5KB of volatile cryptographic memory can also be used as general-purpose data memory. The 256B of battery-backed NV SRAM can be used for key storage and other critical data. The 256B memory can be erased in less than 1µs using a single pulse ("rapid zeroization"), even in battery-backed mode.
The device is powered either from the USB bus or by a separate 3.3V voltage supply. A battery connection is provided for applications that want to maintain secret key data for years without draining the battery from application use. In battery-backed mode, the NV SRAM and security sensors consume less than 240nA (typ). Battery backup is optional; applications can choose to store critical data in the flash memory when the cost of the battery outweighs the benefits of constant monitoring for tamper conditions.
Applications
- Certificate Management
- e-Commerce
- Electronic Signature Generation
- Pay-per-Play
- Prepaid Utility
- Secure Access Control
- Security and Banking Tokens
- Smart Grid Security
Documentation
Data Sheet 1
Reliability Data 1
Application Note 1
Design Note 1
Technical Articles 2
Complete documentation is available upon completion of a Non-Disclosure Agreement (NDA). To request an NDA, click here.
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal. View our quality and reliability program and certifications for more information.
| Part Model | Pin/Package Drawing | Documentation | CAD Symbols, Footprints, and 3D Models |
|---|---|---|---|
| MAXQ1050-BNS+ | 40-LFCSP-5X5X0.75 |
This is the most up-to-date revision of the Data Sheet.
Hardware Ecosystem
Latest Discussions
No discussions on MAXQ1050 yet. Have something to say?
Start a Discussion on EngineerZone®