--------------------------------------------------------
-- BSDL for ADSP-21161 Digital Signal Processor
-- in the 225 ball PBGA Package
--
-- $Revision: 1.9 $
-- $Date: 2002/05/28 18:13:33 $
-- $Log: bsdl_lchh_pbga.txt,v $
-- Revision 1.9 2002/05/28 18:13:33 brownell
-- Corrected Pin orering for DATA Bus
--
-- Revision 1.8 2001/05/25 21:00:36 brownell
-- Changed "ADSP_LCHH" to "ADSP_21161"
-- Corrected Signal names to match datasheet pin names
--
-- Revision 1.7 2001/02/22 15:36:09 brownell
-- Comment for 1.5 should be fixed attribute for TRST_B to be true
-- Changed CLKDBL input ordering in the scan chain
--
-- Revision 1.6 2001/02/22 15:35:43 brownell
-- update
--
-- Revision 1.5 2001/02/22 15:24:48 brownell
-- update
--
-- Revision 1.4 2001/01/16 15:01:21 sleining
-- corrected ms[x] to be bi-directional
--
-- Revision 1.3 2001/01/08 19:15:50 sleining
-- changed tmode (c3) and dclkcfg (b15) to nc
-- syntax clean first release version
--
-- Revision 1.2 2001/01/06 20:15:36 sleining
-- syntax clean, tmode and dclkcfg declared
--
-- Revision 1.1 2000/03/03 16:27:04 sleining
-- Initial
--
--
entity ADSP_21161 is
generic (PHYSICAL_PIN_MAP : string:="UNDEFINED");
port( ADDR: inout bit_vector(0 to 23);
DATA: inout bit_vector(16 to 47);
MS_B: inout bit_vector(0 to 3);
RD_B: inout bit;
WR_B: inout bit;
BRST: inout bit;
ACK: inout bit;
SBTS_B: in bit;
CAS_B: inout bit;
RAS_B: inout bit;
SDWE: inout bit;
DQM: out bit;
SDCLK0: inout bit;
SDCLK1: out bit;
SDCKE: inout bit;
SDA10: out bit;
IRQ0_B: in bit;
IRQ1_B: in bit;
IRQ2_B: in bit;
FLAG0: inout bit;
FLAG1: inout bit;
FLAG2: inout bit;
FLAG3: inout bit;
FLAG4: inout bit;
FLAG5: inout bit;
FLAG6: inout bit;
FLAG7: inout bit;
FLAG8: inout bit;
FLAG9: inout bit;
FLAG10: inout bit;
FLAG11: inout bit;
TIMEXP: out bit;
HBR_B: in bit;
HBG_B: inout bit;
CS_B: in bit;
REDY: out bit;
DMAR1_B: in bit;
DMAR2_B: in bit;
DMAG1_B: out bit;
DMAG2_B: out bit;
BR_B: inout bit_vector(1 to 6);
BMSTR: out bit;
ID0: in bit;
ID1: in bit;
ID2: in bit;
RPBA: in bit;
PA_B: inout bit;
D0A: inout bit;
D1A: inout bit;
D2A: inout bit;
D3A: inout bit;
D0B: inout bit;
D1B: inout bit;
D2B: inout bit;
D3B: inout bit;
SCLK0: inout bit;
SCLK1: inout bit;
SCLK2: inout bit;
SCLK3: inout bit;
FS0: inout bit;
FS1: inout bit;
FS2: inout bit;
FS3: inout bit;
SPICLK: inout bit;
SPIDS_B: in bit;
MOSI: inout bit;
MISO: inout bit;
L0DAT: inout bit_vector(0 to 7);
L0CLK: inout bit;
L0ACK: inout bit;
L1DAT: inout bit_vector(0 to 7);
L1CLK: inout bit;
L1ACK: inout bit;
EBOOT: in bit;
LBOOT: in bit;
BMS_B: inout bit;
CLKIN: linkage bit;
XTAL: linkage bit;
CLKOUT: out bit;
CLK_CFG0: in bit;
CLK_CFG1: in bit;
CLKDBL_B: in bit;
RESET_B: in bit;
TCK: in bit;
TMS: in bit;
TDI: in bit;
TDO: out bit;
TRST_B: in bit;
EMU_B: out bit;
NC_0: in bit;
NC_1: inout bit;
AVDD: linkage bit;
AGND: linkage bit;
IOVDD: linkage bit_vector(0 to 12);
VDD: linkage bit_vector(0 to 13);
GND: linkage bit_vector(0 to 24));
use STD_1149_1_1990.all;
attribute PIN_MAP of ADSP_21161: entity is PHYSICAL_PIN_MAP;
constant PBGA_PACKAGE: PIN_MAP_STRING:=
"ADDR: (M5,N5,L4,R4,P4,N4,M4,R3,P3,P2,N3,R2,M2," &
"P1,N1,N2,M1,L2,M3,L1,K3,L3,K2,K4)," &
"DATA: (L14,M13,L15,K13,L13,K14,K12,K15,J13,J14,J12," &
"J15,H13,H12,H14,H15,G15,G14,G12,G13,F15,F12," &
"F14,E13,F13,E15,D13,E14,D15,C14,D14,C15)," &
"MS_B: (N6,M6,P5,R5)," &
"RD_B: R8," &
"WR_B: M9," &
"BRST: N9," &
"ACK: M12," &
"SBTS_B: P6 ," &
"CAS_B: L12," &
"RAS_B: M11," &
"SDWE: R14," &
"DQM: P13," &
"SDCLK0: P10 ," &
"SDCLK1: P9 ," &
"SDCKE: N10," &
"SDA10: M10," &
"IRQ0_B: H2," &
"IRQ1_B: H4," &
"IRQ2_B: J1," &
"FLAG0: H1," &
"FLAG1: G1," &
"FLAG2: G2," &
"FLAG3: G4," &
"FLAG4: G3," &
"FLAG5: F1," &
"FLAG6: F4," &
"FLAG7: F2," &
"FLAG8: E3," &
"FLAG9: F3," &
"FLAG10: E1," &
"FLAG11: D3," &
"TIMEXP: K1," &
"HBR_B: R10," &
"HBG_B: R11," &
"CS_B: N11," &
"REDY: P11," &
"DMAR1_B: N15 ," &
"DMAR2_B: P15," &
"DMAG1_B: M15," &
"DMAG2_B: M14," &
"BR_B: (P8,N8,R7,P7,N7,M7)," &
"BMSTR: A2," &
"ID0: J4," &
"ID1: J2," &
"ID2: J3," &
"RPBA: B3," &
"PA_B: R6," &
"D0A: E4," &
"D1A: C6," &
"D2A: C7," &
"D3A: B8," &
"D0B: C5," &
"D1B: D6," &
"D2B: B7," &
"D3B: A8," &
"SCLK0: D5," &
"SCLK1: B6," &
"SCLK2: A7," &
"SCLK3: D9," &
"FS0: B5," &
"FS1: D7," &
"FS2: C8," &
"FS3: C9," &
"SPICLK: C4," &
"SPIDS_B: A4," &
"MOSI: B4," &
"MISO: D4," &
"L0DAT: (E12,B11,A11,D11,A9,D10,C10,B9)," &
"L0CLK: B10," &
"L0ACK: A10," &
"L1DAT: (B14,C13,A14,C12,B12,D12,A12,C11)," &
"L1CLK: A13," &
"L1ACK: B13," &
"EBOOT: A5," &
"LBOOT: A6," &
"BMS_B: A3," &
"CLKIN: P12," &
"XTAL: R13," &
"CLKOUT: R9," &
"CLK_CFG0:N13," &
"CLK_CFG1:N12 ," &
"CLKDBL_B:R12," &
"RESET_B: E2," &
"TCK: D2," &
"TMS: C1," &
"TDI: B2," &
"TDO: D1," &
"TRST_B: B1," &
"EMU_B: C2," &
"NC_0: C3," &
"NC_1: B15," &
"AVDD: N14," &
"AGND: P14," &
"IOVDD: (E5,E7,E9,E11,G5,G11,J5,J11,L5,L7,L9,L11,M8)," &
"VDD: (D8,E6,E8,E10,F5,F11,H3,H5,H11,K5,K11,L6,L8,L10)," &
"GND: (F6,F7,F8,F9,F10,G6,G7,G8,G9,G10,H6,H7,H8,H9,H10," &
"J6,J7,J8,J9,J10,K6,K7,K8,K9,K10)" ;
attribute TAP_SCAN_IN of TDI : signal is true;
attribute TAP_SCAN_MODE of TMS : signal is true;
attribute TAP_SCAN_OUT of TDO : signal is true;
attribute TAP_SCAN_RESET of TRST_B : signal is true;
attribute TAP_SCAN_CLOCK of TCK : signal is (50.0e6, BOTH);
attribute INSTRUCTION_LENGTH of ADSP_21161: entity is 5;
-- Unspecified opcodes assigned to Bypass.
attribute INSTRUCTION_OPCODE of ADSP_21161: entity is
"BYPASS (11111)," &
"EXTEST (00000)," &
"SAMPLE (10000)," &
"INTEST (11000)," &
"MEMTEST (10101)," &
"EMULATION (00100,10100,10110,01100,11100,00010)";
attribute INSTRUCTION_CAPTURE of ADSP_21161: entity is
"00001";
attribute INSTRUCTION_PRIVATE of ADSP_21161: entity is
"EMULATION," &
"MEMTEST";
-- attribute INSTRUCTION_USAGE of ADSP_21161: entity is
-- "INTEST (clock CLKIN)";
attribute BOUNDARY_CELLS of ADSP_21161: entity is
"BC_1, BC_2, BC_3, BC_4";
-- BC_1: output, control; BC_2: input; BC_3: internal; BC_4: clock;
attribute BOUNDARY_LENGTH of ADSP_21161: entity is 481;
attribute BOUNDARY_REGISTER of ADSP_21161: entity is
--num cell port function safe [ccell disval rslt ]
" 0 ( BC_3 , * , internal , X ) , " &
" 1 ( BC_3 , * , internal , X ) , " &
" 2 ( BC_2 , NC_0 , input , X ) , " &
" 3 ( BC_1 , BMSTR , output3 , X , 4 , 0 , Z ) , " &
" 4 ( BC_1 , * , control , 0 ) , " &
" 5 ( BC_3 , * , internal , X ) , " &
" 6 ( BC_1 , EMU_B , output3 , X , 7 , 0 , Z ) , " &
" 7 ( BC_1 , * , control , 0 ) , " &
" 8 ( BC_3 , * , internal , X ) , " &
" 9 ( BC_3 , * , internal , X ) , " &
" 10 ( BC_3 , * , internal , X ) , " &
" 11 ( BC_2 , RESET_B , input , X ) , " &
" 12 ( BC_1 , FLAG11 , output3 , X , 13 , 0 , Z ) , " &
" 13 ( BC_1 , * , control , 0 ) , " &
" 14 ( BC_2 , FLAG11 , input , X ) , " &
" 15 ( BC_1 , FLAG10 , output3 , X , 16 , 0 , Z ) , " &
" 16 ( BC_1 , * , control , 0 ) , " &
" 17 ( BC_2 , FLAG10 , input , X ) , " &
" 18 ( BC_1 , FLAG9 , output3 , X , 19 , 0 , Z ) , " &
" 19 ( BC_1 , * , control , 0 ) , " &
" 20 ( BC_2 , FLAG9 , input , X ) , " &
" 21 ( BC_1 , FLAG8 , output3 , X , 22 , 0 , Z ) , " &
" 22 ( BC_1 , * , control , 0 ) , " &
" 23 ( BC_2 , FLAG8 , input , X ) , " &
" 24 ( BC_1 , FLAG7 , output3 , X , 25 , 0 , Z ) , " &
" 25 ( BC_1 , * , control , 0 ) , " &
" 26 ( BC_2 , FLAG7 , input , X ) , " &
" 27 ( BC_1 , FLAG6 , output3 , X , 28 , 0 , Z ) , " &
" 28 ( BC_1 , * , control , 0 ) , " &
" 29 ( BC_2 , FLAG6 , input , X ) , " &
" 30 ( BC_1 , FLAG5 , output3 , X , 31 , 0 , Z ) , " &
" 31 ( BC_1 , * , control , 0 ) , " &
" 32 ( BC_2 , FLAG5 , input , X ) , " &
" 33 ( BC_1 , FLAG4 , output3 , X , 34 , 0 , Z ) , " &
" 34 ( BC_1 , * , control , 0 ) , " &
" 35 ( BC_2 , FLAG4 , input , X ) , " &
" 36 ( BC_1 , FLAG3 , output3 , X , 37 , 0 , Z ) , " &
" 37 ( BC_1 , * , control , 0 ) , " &
" 38 ( BC_2 , FLAG3 , input , X ) , " &
" 39 ( BC_1 , FLAG2 , output3 , X , 40 , 0 , Z ) , " &
" 40 ( BC_1 , * , control , 0 ) , " &
" 41 ( BC_2 , FLAG2 , input , X ) , " &
" 42 ( BC_1 , FLAG1 , output3 , X , 43 , 0 , Z ) , " &
" 43 ( BC_1 , * , control , 0 ) , " &
" 44 ( BC_2 , FLAG1 , input , X ) , " &
" 45 ( BC_1 , FLAG0 , output3 , X , 46 , 0 , Z ) , " &
" 46 ( BC_1 , * , control , 0 ) , " &
" 47 ( BC_2 , FLAG0 , input , X ) , " &
" 48 ( BC_3 , * , internal , X ) , " &
" 49 ( BC_3 , * , internal , X ) , " &
" 50 ( BC_2 , IRQ0_B , input , X ) , " &
" 51 ( BC_3 , * , internal , X ) , " &
" 52 ( BC_3 , * , internal , X ) , " &
" 53 ( BC_2 , IRQ1_B , input , X ) , " &
" 54 ( BC_3 , * , internal , X ) , " &
" 55 ( BC_3 , * , internal , X ) , " &
" 56 ( BC_2 , IRQ2_B , input , X ) , " &
" 57 ( BC_3 , * , internal , X ) , " &
" 58 ( BC_3 , * , internal , X ) , " &
" 59 ( BC_2 , ID0 , input , X ) , " &
" 60 ( BC_3 , * , internal , X ) , " &
" 61 ( BC_3 , * , internal , X ) , " &
" 62 ( BC_2 , ID1 , input , X ) , " &
" 63 ( BC_3 , * , internal , X ) , " &
" 64 ( BC_3 , * , internal , X ) , " &
" 65 ( BC_2 , ID2 , input , X ) , " &
" 66 ( BC_1 , TIMEXP , output3 , X , 67 , 0 , Z ) , " &
" 67 ( BC_1 , * , control , 0 ) , " &
" 68 ( BC_3 , * , internal , X ) , " &
" 69 ( BC_1 , ADDR(23) , output3 , X , 70 , 0 , Z ) , " &
" 70 ( BC_1 , * , control , 0 ) , " &
" 71 ( BC_2 , ADDR(23) , input , X ) , " &
" 72 ( BC_1 , ADDR(22) , output3 , X , 73 , 0 , Z ) , " &
" 73 ( BC_1 , * , control , 0 ) , " &
" 74 ( BC_2 , ADDR(22) , input , X ) , " &
" 75 ( BC_1 , ADDR(21) , output3 , X , 76 , 0 , Z ) , " &
" 76 ( BC_1 , * , control , 0 ) , " &
" 77 ( BC_2 , ADDR(21) , input , X ) , " &
" 78 ( BC_1 , ADDR(20) , output3 , X , 79 , 0 , Z ) , " &
" 79 ( BC_1 , * , control , 0 ) , " &
" 80 ( BC_2 , ADDR(20) , input , X ) , " &
" 81 ( BC_1 , ADDR(19) , output3 , X , 82 , 0 , Z ) , " &
" 82 ( BC_1 , * , control , 0 ) , " &
" 83 ( BC_2 , ADDR(19) , input , X ) , " &
" 84 ( BC_1 , ADDR(18) , output3 , X , 85 , 0 , Z ) , " &
" 85 ( BC_1 , * , control , 0 ) , " &
" 86 ( BC_2 , ADDR(18) , input , X ) , " &
" 87 ( BC_1 , ADDR(17) , output3 , X , 88 , 0 , Z ) , " &
" 88 ( BC_1 , * , control , 0 ) , " &
" 89 ( BC_2 , ADDR(17) , input , X ) , " &
" 90 ( BC_1 , ADDR(16) , output3 , X , 91 , 0 , Z ) , " &
" 91 ( BC_1 , * , control , 0 ) , " &
" 92 ( BC_2 , ADDR(16) , input , X ) , " &
" 93 ( BC_1 , ADDR(15) , output3 , X , 94 , 0 , Z ) , " &
" 94 ( BC_1 , * , control , 0 ) , " &
" 95 ( BC_2 , ADDR(15) , input , X ) , " &
" 96 ( BC_1 , ADDR(14) , output3 , X , 97 , 0 , Z ) , " &
" 97 ( BC_1 , * , control , 0 ) , " &
" 98 ( BC_2 , ADDR(14) , input , X ) , " &
" 99 ( BC_1 , ADDR(13) , output3 , X , 100 , 0 , Z ) , " &
" 100 ( BC_1 , * , control , 0 ) , " &
" 101 ( BC_2 , ADDR(13) , input , X ) , " &
" 102 ( BC_1 , ADDR(12) , output3 , X , 103 , 0 , Z ) , " &
" 103 ( BC_1 , * , control , 0 ) , " &
" 104 ( BC_2 , ADDR(12) , input , X ) , " &
" 105 ( BC_1 , ADDR(11) , output3 , X , 106 , 0 , Z ) , " &
" 106 ( BC_1 , * , control , 0 ) , " &
" 107 ( BC_2 , ADDR(11) , input , X ) , " &
" 108 ( BC_1 , ADDR(10) , output3 , X , 109 , 0 , Z ) , " &
" 109 ( BC_1 , * , control , 0 ) , " &
" 110 ( BC_2 , ADDR(10) , input , X ) , " &
" 111 ( BC_1 , ADDR(9) , output3 , X , 112 , 0 , Z ) , " &
" 112 ( BC_1 , * , control , 0 ) , " &
" 113 ( BC_2 , ADDR(9) , input , X ) , " &
" 114 ( BC_1 , ADDR(8) , output3 , X , 115 , 0 , Z ) , " &
" 115 ( BC_1 , * , control , 0 ) , " &
" 116 ( BC_2 , ADDR(8) , input , X ) , " &
" 117 ( BC_1 , ADDR(7) , output3 , X , 118 , 0 , Z ) , " &
" 118 ( BC_1 , * , control , 0 ) , " &
" 119 ( BC_2 , ADDR(7) , input , X ) , " &
" 120 ( BC_1 , ADDR(6) , output3 , X , 121 , 0 , Z ) , " &
" 121 ( BC_1 , * , control , 0 ) , " &
" 122 ( BC_2 , ADDR(6) , input , X ) , " &
" 123 ( BC_1 , ADDR(5) , output3 , X , 124 , 0 , Z ) , " &
" 124 ( BC_1 , * , control , 0 ) , " &
" 125 ( BC_2 , ADDR(5) , input , X ) , " &
" 126 ( BC_1 , ADDR(4) , output3 , X , 127 , 0 , Z ) , " &
" 127 ( BC_1 , * , control , 0 ) , " &
" 128 ( BC_2 , ADDR(4) , input , X ) , " &
" 129 ( BC_1 , ADDR(3) , output3 , X , 130 , 0 , Z ) , " &
" 130 ( BC_1 , * , control , 0 ) , " &
" 131 ( BC_2 , ADDR(3) , input , X ) , " &
" 132 ( BC_1 , ADDR(2) , output3 , X , 133 , 0 , Z ) , " &
" 133 ( BC_1 , * , control , 0 ) , " &
" 134 ( BC_2 , ADDR(2) , input , X ) , " &
" 135 ( BC_1 , ADDR(1) , output3 , X , 136 , 0 , Z ) , " &
" 136 ( BC_1 , * , control , 0 ) , " &
" 137 ( BC_2 , ADDR(1) , input , X ) , " &
" 138 ( BC_1 , ADDR(0) , output3 , X , 139 , 0 , Z ) , " &
" 139 ( BC_1 , * , control , 0 ) , " &
" 140 ( BC_2 , ADDR(0) , input , X ) , " &
" 141 ( BC_1 , MS_B(3) , output3 , X , 142 , 0 , Z ) , " &
" 142 ( BC_1 , * , control , 0 ) , " &
" 143 ( BC_3 , MS_B(3) , input , X ) , " &
" 144 ( BC_1 , MS_B(2) , output3 , X , 145 , 0 , Z ) , " &
" 145 ( BC_1 , * , control , 0 ) , " &
" 146 ( BC_3 , MS_B(2) , input , X ) , " &
" 147 ( BC_1 , MS_B(1) , output3 , X , 148 , 0 , Z ) , " &
" 148 ( BC_1 , * , control , 0 ) , " &
" 149 ( BC_3 , MS_B(1) , input , X ) , " &
" 150 ( BC_1 , MS_B(0) , output3 , X , 151 , 0 , Z ) , " &
" 151 ( BC_1 , * , control , 0 ) , " &
" 152 ( BC_3 , MS_B(0) , input , X ) , " &
" 153 ( BC_3 , * , internal , X ) , " &
" 154 ( BC_3 , * , internal , X ) , " &
" 155 ( BC_2 , SBTS_B , input , X ) , " &
" 156 ( BC_1 , PA_B , output3 , X , 157 , 0 , Z ) , " &
" 157 ( BC_1 , * , control , 0 ) , " &
" 158 ( BC_2 , PA_B , input , X ) , " &
" 159 ( BC_1 , BR_B(6) , output3 , X , 160 , 0 , Z ) , " &
" 160 ( BC_1 , * , control , 0 ) , " &
" 161 ( BC_2 , BR_B(6) , input , X ) , " &
" 162 ( BC_1 , BR_B(5) , output3 , X , 163 , 0 , Z ) , " &
" 163 ( BC_1 , * , control , 0 ) , " &
" 164 ( BC_2 , BR_B(5) , input , X ) , " &
" 165 ( BC_1 , BR_B(4) , output3 , X , 166 , 0 , Z ) , " &
" 166 ( BC_1 , * , control , 0 ) , " &
" 167 ( BC_2 , BR_B(4) , input , X ) , " &
" 168 ( BC_1 , BR_B(3) , output3 , X , 169 , 0 , Z ) , " &
" 169 ( BC_1 , * , control , 0 ) , " &
" 170 ( BC_2 , BR_B(3) , input , X ) , " &
" 171 ( BC_1 , BR_B(2) , output3 , X , 172 , 0 , Z ) , " &
" 172 ( BC_1 , * , control , 0 ) , " &
" 173 ( BC_2 , BR_B(2) , input , X ) , " &
" 174 ( BC_1 , BR_B(1) , output3 , X , 175 , 0 , Z ) , " &
" 175 ( BC_1 , * , control , 0 ) , " &
" 176 ( BC_2 , BR_B(1) , input , X ) , " &
" 177 ( BC_1 , WR_B , output3 , X , 178 , 0 , Z ) , " &
" 178 ( BC_1 , * , control , 0 ) , " &
" 179 ( BC_2 , WR_B , input , X ) , " &
" 180 ( BC_1 , RD_B , output3 , X , 181 , 0 , Z ) , " &
" 181 ( BC_1 , * , control , 0 ) , " &
" 182 ( BC_2 , RD_B , input , X ) , " &
" 183 ( BC_1 , BRST , output3 , X , 184 , 0 , Z ) , " &
" 184 ( BC_1 , * , control , 0 ) , " &
" 185 ( BC_2 , BRST , input , X ) , " &
" 186 ( BC_1 , SDCLK1 , output3 , X , 187 , 0 , Z ) , " &
" 187 ( BC_1 , * , control , 0 ) , " &
" 188 ( BC_3 , * , internal , X ) , " &
" 189 ( BC_1 , SDA10 , output3 , X , 190 , 0 , Z ) , " &
" 190 ( BC_1 , * , control , 0 ) , " &
" 191 ( BC_3 , * , internal , X ) , " &
" 192 ( BC_1 , SDCKE , output3 , X , 193 , 0 , Z ) , " &
" 193 ( BC_1 , * , control , 0 ) , " &
" 194 ( BC_2 , SDCKE , input , X ) , " &
" 195 ( BC_1 , CLKOUT , output3 , X , 196 , 0 , Z ) , " &
" 196 ( BC_1 , * , control , 0 ) , " &
" 197 ( BC_3 , * , internal , X ) , " &
" 198 ( BC_1 , SDCLK0 , output3 , X , 199 , 0 , Z ) , " &
" 199 ( BC_1 , * , control , 0 ) , " &
" 200 ( BC_2 , SDCLK0 , input , X ) , " &
" 201 ( BC_1 , CAS_B , output3 , X , 202 , 0 , Z ) , " &
" 202 ( BC_1 , * , control , 0 ) , " &
" 203 ( BC_2 , CAS_B , input , X ) , " &
" 204 ( BC_1 , RAS_B , output3 , X , 205 , 0 , Z ) , " &
" 205 ( BC_1 , * , control , 0 ) , " &
" 206 ( BC_2 , RAS_B , input , X ) , " &
" 207 ( BC_3 , * , internal , X ) , " &
" 208 ( BC_3 , * , internal , X ) , " &
" 209 ( BC_2 , HBR_B , input , X ) , " &
" 210 ( BC_1 , HBG_B , output3 , X , 211 , 0 , Z ) , " &
" 211 ( BC_1 , * , control , 0 ) , " &
" 212 ( BC_2 , HBG_B , input , X ) , " &
" 213 ( BC_1 , REDY , output3 , X , 214 , 0 , Z ) , " &
" 214 ( BC_1 , * , control , 0 ) , " &
" 215 ( BC_3 , * , internal , X ) , " &
" 216 ( BC_1 , ACK , output3 , X , 217 , 0 , Z ) , " &
" 217 ( BC_1 , * , control , 0 ) , " &
" 218 ( BC_2 , ACK , input , X ) , " &
" 219 ( BC_3 , * , internal , X ) , " &
" 220 ( BC_3 , * , internal , X ) , " &
" 221 ( BC_2 , CS_B , input , X ) , " &
" 222 ( BC_3 , * , internal , X ) , " &
" 223 ( BC_3 , * , internal , X ) , " &
" 224 ( BC_2 , CLKDBL_B , input , X ) , " &
" 225 ( BC_1 , DQM , output3 , X , 226 , 0 , Z ) , " &
" 226 ( BC_1 , * , control , 0 ) , " &
" 227 ( BC_3 , * , internal , X ) , " &
" 228 ( BC_1 , SDWE , output3 , X , 229 , 0 , Z ) , " &
" 229 ( BC_1 , * , control , 0 ) , " &
" 230 ( BC_2 , SDWE , input , X ) , " &
" 231 ( BC_3 , * , internal , X ) , " &
" 232 ( BC_3 , * , internal , X ) , " &
" 233 ( BC_2 , CLK_CFG1 , input , X ) , " &
" 234 ( BC_3 , * , internal , X ) , " &
" 235 ( BC_3 , * , internal , X ) , " &
" 236 ( BC_2 , CLK_CFG0 , input , X ) , " &
" 237 ( BC_3 , * , internal , X ) , " &
" 238 ( BC_3 , * , internal , X ) , " &
" 239 ( BC_2 , DMAR2_B , input , X ) , " &
" 240 ( BC_1 , DMAG2_B , output3 , X , 241 , 0 , Z ) , " &
" 241 ( BC_1 , * , control , 0 ) , " &
" 242 ( BC_3 , * , internal , X ) , " &
" 243 ( BC_3 , * , internal , X ) , " &
" 244 ( BC_3 , * , internal , X ) , " &
" 245 ( BC_2 , DMAR1_B , input , X ) , " &
" 246 ( BC_1 , DMAG1_B , output3 , X , 247 , 0 , Z ) , " &
" 247 ( BC_1 , * , control , 0 ) , " &
" 248 ( BC_3 , * , internal , X ) , " &
" 249 ( BC_1 , DATA(16) , output3 , X , 250 , 0 , Z ) , " &
" 250 ( BC_1 , * , control , 0 ) , " &
" 251 ( BC_2 , DATA(16) , input , X ) , " &
" 252 ( BC_1 , DATA(17) , output3 , X , 253 , 0 , Z ) , " &
" 253 ( BC_1 , * , control , 0 ) , " &
" 254 ( BC_2 , DATA(17) , input , X ) , " &
" 255 ( BC_1 , DATA(18) , output3 , X , 256 , 0 , Z ) , " &
" 256 ( BC_1 , * , control , 0 ) , " &
" 257 ( BC_2 , DATA(18) , input , X ) , " &
" 258 ( BC_1 , DATA(19) , output3 , X , 259 , 0 , Z ) , " &
" 259 ( BC_1 , * , control , 0 ) , " &
" 260 ( BC_2 , DATA(19) , input , X ) , " &
" 261 ( BC_1 , DATA(20) , output3 , X , 262 , 0 , Z ) , " &
" 262 ( BC_1 , * , control , 0 ) , " &
" 263 ( BC_2 , DATA(20) , input , X ) , " &
" 264 ( BC_1 , DATA(21) , output3 , X , 265 , 0 , Z ) , " &
" 265 ( BC_1 , * , control , 0 ) , " &
" 266 ( BC_2 , DATA(21) , input , X ) , " &
" 267 ( BC_1 , DATA(22) , output3 , X , 268 , 0 , Z ) , " &
" 268 ( BC_1 , * , control , 0 ) , " &
" 269 ( BC_2 , DATA(22) , input , X ) , " &
" 270 ( BC_1 , DATA(23) , output3 , X , 271 , 0 , Z ) , " &
" 271 ( BC_1 , * , control , 0 ) , " &
" 272 ( BC_2 , DATA(23) , input , X ) , " &
" 273 ( BC_1 , DATA(24) , output3 , X , 274 , 0 , Z ) , " &
" 274 ( BC_1 , * , control , 0 ) , " &
" 275 ( BC_2 , DATA(24) , input , X ) , " &
" 276 ( BC_1 , DATA(25) , output3 , X , 277 , 0 , Z ) , " &
" 277 ( BC_1 , * , control , 0 ) , " &
" 278 ( BC_2 , DATA(25) , input , X ) , " &
" 279 ( BC_1 , DATA(26) , output3 , X , 280 , 0 , Z ) , " &
" 280 ( BC_1 , * , control , 0 ) , " &
" 281 ( BC_2 , DATA(26) , input , X ) , " &
" 282 ( BC_1 , DATA(27) , output3 , X , 283 , 0 , Z ) , " &
" 283 ( BC_1 , * , control , 0 ) , " &
" 284 ( BC_2 , DATA(27) , input , X ) , " &
" 285 ( BC_1 , DATA(28) , output3 , X , 286 , 0 , Z ) , " &
" 286 ( BC_1 , * , control , 0 ) , " &
" 287 ( BC_2 , DATA(28) , input , X ) , " &
" 288 ( BC_1 , DATA(29) , output3 , X , 289 , 0 , Z ) , " &
" 289 ( BC_1 , * , control , 0 ) , " &
" 290 ( BC_2 , DATA(29) , input , X ) , " &
" 291 ( BC_1 , DATA(30) , output3 , X , 292 , 0 , Z ) , " &
" 292 ( BC_1 , * , control , 0 ) , " &
" 293 ( BC_2 , DATA(30) , input , X ) , " &
" 294 ( BC_1 , DATA(31) , output3 , X , 295 , 0 , Z ) , " &
" 295 ( BC_1 , * , control , 0 ) , " &
" 296 ( BC_2 , DATA(31) , input , X ) , " &
" 297 ( BC_1 , DATA(32) , output3 , X , 298 , 0 , Z ) , " &
" 298 ( BC_1 , * , control , 0 ) , " &
" 299 ( BC_2 , DATA(32) , input , X ) , " &
" 300 ( BC_1 , DATA(33) , output3 , X , 301 , 0 , Z ) , " &
" 301 ( BC_1 , * , control , 0 ) , " &
" 302 ( BC_2 , DATA(33) , input , X ) , " &
" 303 ( BC_1 , DATA(34) , output3 , X , 304 , 0 , Z ) , " &
" 304 ( BC_1 , * , control , 0 ) , " &
" 305 ( BC_2 , DATA(34) , input , X ) , " &
" 306 ( BC_1 , DATA(35) , output3 , X , 307 , 0 , Z ) , " &
" 307 ( BC_1 , * , control , 0 ) , " &
" 308 ( BC_2 , DATA(35) , input , X ) , " &
" 309 ( BC_1 , DATA(36) , output3 , X , 310 , 0 , Z ) , " &
" 310 ( BC_1 , * , control , 0 ) , " &
" 311 ( BC_2 , DATA(36) , input , X ) , " &
" 312 ( BC_1 , DATA(37) , output3 , X , 313 , 0 , Z ) , " &
" 313 ( BC_1 , * , control , 0 ) , " &
" 314 ( BC_2 , DATA(37) , input , X ) , " &
" 315 ( BC_1 , DATA(38) , output3 , X , 316 , 0 , Z ) , " &
" 316 ( BC_1 , * , control , 0 ) , " &
" 317 ( BC_2 , DATA(38) , input , X ) , " &
" 318 ( BC_1 , DATA(39) , output3 , X , 319 , 0 , Z ) , " &
" 319 ( BC_1 , * , control , 0 ) , " &
" 320 ( BC_2 , DATA(39) , input , X ) , " &
" 321 ( BC_1 , DATA(40) , output3 , X , 322 , 0 , Z ) , " &
" 322 ( BC_1 , * , control , 0 ) , " &
" 323 ( BC_2 , DATA(40) , input , X ) , " &
" 324 ( BC_1 , DATA(41) , output3 , X , 325 , 0 , Z ) , " &
" 325 ( BC_1 , * , control , 0 ) , " &
" 326 ( BC_2 , DATA(41) , input , X ) , " &
" 327 ( BC_1 , DATA(42) , output3 , X , 328 , 0 , Z ) , " &
" 328 ( BC_1 , * , control , 0 ) , " &
" 329 ( BC_2 , DATA(42) , input , X ) , " &
" 330 ( BC_1 , DATA(43) , output3 , X , 331 , 0 , Z ) , " &
" 331 ( BC_1 , * , control , 0 ) , " &
" 332 ( BC_2 , DATA(43) , input , X ) , " &
" 333 ( BC_1 , DATA(44) , output3 , X , 334 , 0 , Z ) , " &
" 334 ( BC_1 , * , control , 0 ) , " &
" 335 ( BC_2 , DATA(44) , input , X ) , " &
" 336 ( BC_1 , DATA(45) , output3 , X , 337 , 0 , Z ) , " &
" 337 ( BC_1 , * , control , 0 ) , " &
" 338 ( BC_2 , DATA(45) , input , X ) , " &
" 339 ( BC_1 , DATA(46) , output3 , X , 340 , 0 , Z ) , " &
" 340 ( BC_1 , * , control , 0 ) , " &
" 341 ( BC_2 , DATA(46) , input , X ) , " &
" 342 ( BC_1 , DATA(47) , output3 , X , 343 , 0 , Z ) , " &
" 343 ( BC_1 , * , control , 0 ) , " &
" 344 ( BC_2 , DATA(47) , input , X ) , " &
" 345 ( BC_1 , NC_1 , output3 , X , 346 , 0 , Z ) , " &
" 346 ( BC_1 , * , control , 0 ) , " &
" 347 ( BC_2 , NC_1 , input , X ) , " &
" 348 ( BC_1 , L1DAT(0) , output3 , X , 349 , 0 , Z ) , " &
" 349 ( BC_1 , * , control , 0 ) , " &
" 350 ( BC_2 , L1DAT(0) , input , X ) , " &
" 351 ( BC_1 , L1DAT(1) , output3 , X , 352 , 0 , Z ) , " &
" 352 ( BC_1 , * , control , 0 ) , " &
" 353 ( BC_2 , L1DAT(1) , input , X ) , " &
" 354 ( BC_1 , L1DAT(2) , output3 , X , 355 , 0 , Z ) , " &
" 355 ( BC_1 , * , control , 0 ) , " &
" 356 ( BC_2 , L1DAT(2) , input , X ) , " &
" 357 ( BC_1 , L1DAT(3) , output3 , X , 358 , 0 , Z ) , " &
" 358 ( BC_1 , * , control , 0 ) , " &
" 359 ( BC_2 , L1DAT(3) , input , X ) , " &
" 360 ( BC_1 , L1ACK , output3 , X , 361 , 0 , Z ) , " &
" 361 ( BC_1 , * , control , 0 ) , " &
" 362 ( BC_2 , L1ACK , input , X ) , " &
" 363 ( BC_1 , L1CLK , output3 , X , 364 , 0 , Z ) , " &
" 364 ( BC_1 , * , control , 0 ) , " &
" 365 ( BC_2 , L1CLK , input , X ) , " &
" 366 ( BC_1 , L1DAT(4) , output3 , X , 367 , 0 , Z ) , " &
" 367 ( BC_1 , * , control , 0 ) , " &
" 368 ( BC_2 , L1DAT(4) , input , X ) , " &
" 369 ( BC_1 , L1DAT(5) , output3 , X , 370 , 0 , Z ) , " &
" 370 ( BC_1 , * , control , 0 ) , " &
" 371 ( BC_2 , L1DAT(5) , input , X ) , " &
" 372 ( BC_1 , L1DAT(6) , output3 , X , 373 , 0 , Z ) , " &
" 373 ( BC_1 , * , control , 0 ) , " &
" 374 ( BC_2 , L1DAT(6) , input , X ) , " &
" 375 ( BC_1 , L1DAT(7) , output3 , X , 376 , 0 , Z ) , " &
" 376 ( BC_1 , * , control , 0 ) , " &
" 377 ( BC_2 , L1DAT(7) , input , X ) , " &
" 378 ( BC_1 , L0DAT(0) , output3 , X , 379 , 0 , Z ) , " &
" 379 ( BC_1 , * , control , 0 ) , " &
" 380 ( BC_2 , L0DAT(0) , input , X ) , " &
" 381 ( BC_1 , L0DAT(1) , output3 , X , 382 , 0 , Z ) , " &
" 382 ( BC_1 , * , control , 0 ) , " &
" 383 ( BC_2 , L0DAT(1) , input , X ) , " &
" 384 ( BC_1 , L0DAT(2) , output3 , X , 385 , 0 , Z ) , " &
" 385 ( BC_1 , * , control , 0 ) , " &
" 386 ( BC_2 , L0DAT(2) , input , X ) , " &
" 387 ( BC_1 , L0DAT(3) , output3 , X , 388 , 0 , Z ) , " &
" 388 ( BC_1 , * , control , 0 ) , " &
" 389 ( BC_2 , L0DAT(3) , input , X ) , " &
" 390 ( BC_1 , L0ACK , output3 , X , 391 , 0 , Z ) , " &
" 391 ( BC_1 , * , control , 0 ) , " &
" 392 ( BC_2 , L0ACK , input , X ) , " &
" 393 ( BC_1 , L0CLK , output3 , X , 394 , 0 , Z ) , " &
" 394 ( BC_1 , * , control , 0 ) , " &
" 395 ( BC_2 , L0CLK , input , X ) , " &
" 396 ( BC_1 , L0DAT(4) , output3 , X , 397 , 0 , Z ) , " &
" 397 ( BC_1 , * , control , 0 ) , " &
" 398 ( BC_2 , L0DAT(4) , input , X ) , " &
" 399 ( BC_1 , L0DAT(5) , output3 , X , 400 , 0 , Z ) , " &
" 400 ( BC_1 , * , control , 0 ) , " &
" 401 ( BC_2 , L0DAT(5) , input , X ) , " &
" 402 ( BC_1 , L0DAT(6) , output3 , X , 403 , 0 , Z ) , " &
" 403 ( BC_1 , * , control , 0 ) , " &
" 404 ( BC_2 , L0DAT(6) , input , X ) , " &
" 405 ( BC_1 , L0DAT(7) , output3 , X , 406 , 0 , Z ) , " &
" 406 ( BC_1 , * , control , 0 ) , " &
" 407 ( BC_2 , L0DAT(7) , input , X ) , " &
" 408 ( BC_1 , FS3 , output3 , X , 409 , 0 , Z ) , " &
" 409 ( BC_1 , * , control , 0 ) , " &
" 410 ( BC_2 , FS3 , input , X ) , " &
" 411 ( BC_1 , SCLK3 , output3 , X , 412 , 0 , Z ) , " &
" 412 ( BC_1 , * , control , 0 ) , " &
" 413 ( BC_2 , SCLK3 , input , X ) , " &
" 414 ( BC_1 , D3B , output3 , X , 415 , 0 , Z ) , " &
" 415 ( BC_1 , * , control , 0 ) , " &
" 416 ( BC_2 , D3B , input , X ) , " &
" 417 ( BC_1 , D3A , output3 , X , 418 , 0 , Z ) , " &
" 418 ( BC_1 , * , control , 0 ) , " &
" 419 ( BC_2 , D3A , input , X ) , " &
" 420 ( BC_1 , FS2 , output3 , X , 421 , 0 , Z ) , " &
" 421 ( BC_1 , * , control , 0 ) , " &
" 422 ( BC_2 , FS2 , input , X ) , " &
" 423 ( BC_1 , SCLK2 , output3 , X , 424 , 0 , Z ) , " &
" 424 ( BC_1 , * , control , 0 ) , " &
" 425 ( BC_2 , SCLK2 , input , X ) , " &
" 426 ( BC_1 , D2B , output3 , X , 427 , 0 , Z ) , " &
" 427 ( BC_1 , * , control , 0 ) , " &
" 428 ( BC_2 , D2B , input , X ) , " &
" 429 ( BC_1 , D2A , output3 , X , 430 , 0 , Z ) , " &
" 430 ( BC_1 , * , control , 0 ) , " &
" 431 ( BC_2 , D2A , input , X ) , " &
" 432 ( BC_1 , FS1 , output3 , X , 433 , 0 , Z ) , " &
" 433 ( BC_1 , * , control , 0 ) , " &
" 434 ( BC_2 , FS1 , input , X ) , " &
" 435 ( BC_3 , * , internal , X ) , " &
" 436 ( BC_3 , * , internal , X ) , " &
" 437 ( BC_2 , LBOOT , input , X ) , " &
" 438 ( BC_1 , SCLK1 , output3 , X , 439 , 0 , Z ) , " &
" 439 ( BC_1 , * , control , 0 ) , " &
" 440 ( BC_2 , SCLK1 , input , X ) , " &
" 441 ( BC_1 , D1B , output3 , X , 442 , 0 , Z ) , " &
" 442 ( BC_1 , * , control , 0 ) , " &
" 443 ( BC_2 , D1B , input , X ) , " &
" 444 ( BC_1 , D1A , output3 , X , 445 , 0 , Z ) , " &
" 445 ( BC_1 , * , control , 0 ) , " &
" 446 ( BC_2 , D1A , input , X ) , " &
" 447 ( BC_1 , FS0 , output3 , X , 448 , 0 , Z ) , " &
" 448 ( BC_1 , * , control , 0 ) , " &
" 449 ( BC_2 , FS0 , input , X ) , " &
" 450 ( BC_3 , * , internal , X ) , " &
" 451 ( BC_3 , * , internal , X ) , " &
" 452 ( BC_2 , EBOOT , input , X ) , " &
" 453 ( BC_1 , SCLK0 , output3 , X , 454 , 0 , Z ) , " &
" 454 ( BC_1 , * , control , 0 ) , " &
" 455 ( BC_2 , SCLK0 , input , X ) , " &
" 456 ( BC_1 , D0B , output3 , X , 457 , 0 , Z ) , " &
" 457 ( BC_1 , * , control , 0 ) , " &
" 458 ( BC_2 , D0B , input , X ) , " &
" 459 ( BC_1 , D0A , output3 , X , 460 , 0 , Z ) , " &
" 460 ( BC_1 , * , control , 0 ) , " &
" 461 ( BC_2 , D0A , input , X ) , " &
" 462 ( BC_3 , * , internal , X ) , " &
" 463 ( BC_3 , * , internal , X ) , " &
" 464 ( BC_2 , SPIDS_B , input , X ) , " &
" 465 ( BC_1 , SPICLK , output3 , X , 466 , 0 , Z ) , " &
" 466 ( BC_1 , * , control , 0 ) , " &
" 467 ( BC_2 , SPICLK , input , X ) , " &
" 468 ( BC_1 , MOSI , output3 , X , 469 , 0 , Z ) , " &
" 469 ( BC_1 , * , control , 0 ) , " &
" 470 ( BC_2 , MOSI , input , X ) , " &
" 471 ( BC_1 , MISO , output3 , X , 472 , 0 , Z ) , " &
" 472 ( BC_1 , * , control , 0 ) , " &
" 473 ( BC_2 , MISO , input , X ) , " &
" 474 ( BC_1 , BMS_B , output3 , X , 475 , 0 , Z ) , " &
" 475 ( BC_1 , * , control , 0 ) , " &
" 476 ( BC_2 , BMS_B , input , X ) , " &
" 477 ( BC_3 , * , internal , X ) , " &
" 478 ( BC_3 , * , internal , X ) , " &
" 479 ( BC_2 , RPBA , input , X ) , " &
" 480 ( BC_3 , * , internal , X ) " ;
end ADSP_21161;